“HIGH THROUGHPUT PIPELINED 2D DISCRETE COSINE TRANSFORM” FOR VIDEO COMPRESSION
Abstract: This paper survey of the planning and implementation of a totally pipelined design for implementing the JPEG baseline image compression standard. The design exploits the principles of pipelining and parallelism so as to get high speed and output. During this paper a review of a design and verilog design of fast pipelined 2 dimensional discrete cosines transform on FPGA with quantization which might be used as a core in video compression hardware.
Keywords: Video compression, 2D-DCT, quantization, FPGA, pipelining.
How to Cite:
[1] Jyotishman Saikia, Deepak Kumar, ““HIGH THROUGHPUT PIPELINED 2D DISCRETE COSINE TRANSFORM” FOR VIDEO COMPRESSION,” International Advanced Research Journal in Science, Engineering and Technology (IARJSET), DOI: 10.17148/IARJSET.2016.31119
