FPGA BASED MULTICHANNEL PWM CONTROLLER WITH EMBEDDED DEAD TIME

Abstract: In nowadays industry the voltage source inverters with MOSFET or IGBT devices are used more and more frequently. Such applications include full H-bridge power stages which are prone to shoot through if not properly driven. This situation emerges when the upper and the lower switch from the same side of the bridge are both in on state for some time. The ensuing effect can generate unwanted losses or cause thermal runaway and the result will be a failure of the power switch and even of the whole inverter. A possible solution to the problem is proposed in the paper that injects the so called "interlock delay time" or a "dead time" into the control algorithm. This is made possible with the aid of a programmable logic device which inherent ability for parallel algorithm execution permits to implement multiple Pulse Width Modulator (PWM) devices on a single chip. Because of the physical specifics of the different power transistors the dead time duration can be easily configured via parameters. Moreover the PWM resolution can be easily configured to a non-trivial value such as 9 or 13 bits upon design requirements. All of the above said shows that programmable logic devices outperform the capabilities of most if not any conventional microcontroller available on the market. The proposed algorithm can be used for both soft- or hard-chopping switching strategies. It is highly suitable for industrial applications such as multi-axis robots, that require several driving channels to run simultaneously.

Keywords: Pulse Width Modulation, Dead-time Control, Programmable Logic Device, Commutation Strategy.