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International Advanced Research Journal in Science, Engineering and Technology
International Advanced Research Journal in Science, Engineering and Technology A Monthly Peer-Reviewed Multidisciplinary Journal
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← Back to VOLUME 2, ISSUE 7, JULY 2015

AES IMPLEMENTATION ON XTENSA PROCESSORS

Ashlesha Karandikar (Menavlikar)

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Abstract: This paper introduces implementation of AES on Tensilica's Xtensa processors. Advance Encryption Standard (AES) is a specification for the encryption of electronic data established by the U.S. National Institute of Standards and Technology (NIST). This paper illustrates the efficiency and performance of Tensilica Xtensa processors in accelerating encryption and decryption on Xilinx Kinex7 FPGA. Xtensa processors offer performance that competes with the hardware solutions at the same time provides the benefits of flexibility and programmability of software solutions.

Keywords: Xtensa, Processor, Configurable, Programmable, Cryptography, Encryption, Decryption, AES.

How to Cite:

[1] Ashlesha Karandikar (Menavlikar), “AES IMPLEMENTATION ON XTENSA PROCESSORS,” International Advanced Research Journal in Science, Engineering and Technology (IARJSET), DOI: 10.17148/IARJSET.2015.2704

Creative Commons License This work is licensed under a Creative Commons Attribution 4.0 International License.